Month: January 2020
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10.3 The Gated S-R Latch
It is sometimes useful in logic circuits to have a multivibrator which changes state only when certain conditions are met, regardless of its S and R input states. The conditional input is called the enable, and is symbolized by the letter E. Study the following example to see how this works: When the E=0, the…
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10.2 The S-R Latch
A bistable multivibrator has two stable states, as indicated by the prefix bi in its name. Typically, one state is referred to as set and the other as reset. The simplest bistable device, therefore, is known as a set-reset, or S-R, latch. To create an S-R latch, we can wire two NOR gates in such…
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10.1 Digital Logic With Feedback
With simple gate and combinational logic circuits, there is a definite output state for any given input state. Take the truth table of an OR gate, for instance: For each of the four possible combinations of input states (0-0, 0-1, 1-0, and 1-1), there is one, definite, unambiguous output state. Whether we’re dealing with a…
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9.8 Using Multiple Combinational Circuits
As an example of using several circuits together, we are going to make a device that will have 16 inputs, representing a four digit number, to a four digit 7-segment display but using just one binary-to-7-segment encoder. First, the overall architecture of our circuit provides what looks like our the description provided. Follow this circuit…
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9.7 Multiplexers
A multiplexer, abbreviated mux, is a device that has multiple inputs and one output. The schematic symbol for multiplexers is The truth table for a 2-to-1 multiplexer is Using a 1-to-2 decoder as part of the circuit, we can express this circuit easily. Multiplexers can also be expanded with the same naming conventions as demultiplexers.…
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9.6 Demultiplexers
A demultiplexer, sometimes abbreviated dmux, is a circuit that has one input and more than one output. It is used when a circuit wishes to send a signal to one of many devices. This description sounds similar to the description given for a decoder, but a decoder is used to select among many devices while…
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9.5 Encoder
What is an Encoder? An encoder is a circuit that changes a set of signals into a code. Let’s begin making a 2-to-1 line encoder truth table by reversing the 1-to-2 decoder truth table. This truth table is a little short. A complete truth table would be One question we need to answer is what…
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9.4 Decoder
A decoder is a circuit that changes a code into a set of signals. It is called a decoder because it does the reverse of encoding, but we will begin our study of encoders and decoders with decoders because they are simpler to design. Types of Decoders Line Decoder A common type of decoder is…
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9.3 Full-Adder
The half-adder is extremely useful until you want to add more that one binary digit quantities. The slow way to develop a two binary digit adders would be to make a truth table and reduce it. Then when you decide to make a three binary digit adder, do it again. Then when you decide to…
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9.2 Half-Adder
As a first example of useful combinational logic, let’s build a device that can add two binary digits together. We can quickly calculate what the answers should be: 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 102 So we well need two inputs (a…
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9.1 Introduction to Combinational Logic Functions
The term “combinational” comes to us from mathematics. In mathematics a combination is an unordered set, which is a formal way to say that nobody cares which order the items came in. Most games work this way, if you rolled dice one at a time and get a 2 followed by a 3 it is…
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8.11 Larger 5 & 6-variable Karnaugh Maps
Larger Karnaugh maps reduce larger logic designs. How large is large enough? That depends on the number of inputs, fan-ins, to the logic circuit under consideration. One of the large programmable logic companies has an answer. Altera’s own data, extracted from its library of customer designs, supports the value of heterogeneity. By examining logic cones,…
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8.10 Don’t Care Cells in the Karnaugh Map
Up to this point we have considered logic reduction problems where the input conditions were completely specified. That is, a 3-variable truth table or Karnaugh map had 2n = 23 or 8-entries, a full table or map. It is not always necessary to fill in the complete truth table for some real-world problems. We may…
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8.9 Sum and Product Notation
For reference, this section introduces the terminology used in some texts to describe the minterms and maxterms assigned to a Karnaugh map. Otherwise, there is no new material here. Σ (sigma) indicates sum and lower case “m” indicates minterms. Σm indicates sum of minterms. The following example is revisited to illustrate our point. Instead of…
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8.8 Minterm vs Maxterm Solution
So far we have been finding Sum-Of-Product (SOP) solutions to logic reduction problems. For each of these SOP solutions, there is also a Product-Of-Sums solution (POS), which could be more useful, depending on the application. Before working a Product-Of-Sums solution, we need to introduce some new terminology. The procedure below for mapping product terms is…